Qualification：Master's degree or above

Recruiting Numbers：unlimited

Work Address：Chongqing/chengdu

Salary：

Update time：2025.08.20

1. Work closely with IC design engineers, responsible for developing verification plans related to IC design projects, reviewing verification results, and developing appropriate verification strategies and plans;
2. Develop a verification platform, use Verilog, System Verilog, UVM and other languages/tools, implement efficient chip functionality, perform performance verification, complete verification execution and debugging, and meet Tape Out requirements;
3. Responsible for the verification progress and quality of IC design projects, and able to undertake specific technical tasks;
4. Capable of collaborating with design and software engineers for FPGA platform and sample verification and debugging.

1. Bachelor's degree or above in electronics, communication, computer science, semiconductor physics or microelectronics;
2. Having a solid foundation in IC verification, familiar with the environment and process of IC design verification, proficient in related verification tools such as VCS/NC Sim, and proficient in one or more verification languages;
3. Familiar with Python/Perl/Makefile and other programming tools and scripting languages;
4. Having good communication skills, coordination abilities, and a sense of teamwork;
5. Experience in vehicle specifications and SoC system chip verification is preferred.

Qualification：Master's degree or above

Recruiting Numbers：unlimited

Work Address：Chongqing/chengdu

Salary：

Update time：2025.08.20

1. Complete detailed digital design based on chip system design specifications;
2. Responsible for RTL design and optimization of digital circuits, and completing the corresponding design document output;
3. Participate in FPGA verification work;
4. Develop module validation strategies together with validation and collaborate with the validation department to complete validation work;
5. Collaborate with the backend department to complete module timing optimization and area optimization.

1. Master's degree or above in microelectronics/EE/related majors, with at least 2 years of design experience;
2. Proficient in Verilog/System Verilog and able to independently complete digital circuit design;
3. Familiar with the digital front-end design process, including synthesis, formal verification, timing analysis, etc;
4. Familiarity with ARM SoC systems, AMBA bus protocols, and CAN/LIN/SENT/SPI interfaces is preferred;
5. Experience in vehicle design is preferred.

Qualification：Master's degree or above

Recruiting Numbers：unlimited

Work Address：Chongqing/chengdu

Salary：

Update time：2025.08.20

1. Responsible for defining chip specification requirements, analyzing competitors, and gaining industry insights;
2. Responsible for chip architecture design and IP selection, and outputting overall solution documents;
3. Responsible for evaluating and making decisions on chip area, power consumption, performance, etc., and collaborating with design, backend, and other departments to optimize the chip's PPA;
4. Responsible for low-power design and optimization of chips;
5. Responsible for working with other departments to solve end-to-end technical challenges related to chips, including backend, packaging, chip testing, and system integration.

1. Master's degree or above in microelectronics/EE/related majors, with over 5 years of design experience;
2. Familiar with ARM SoC systems, AMBA bus protocols, and CAN/LIN/SENT/SPI/UART/I2C interfaces;
3. Familiar with the front-end and back-end processes of chips, including design, synthesis DFT、 Backend and other processes;
4. Having a deep understanding of chip PPA optimization, with priority given to having in-depth knowledge and development experience in low-power design and optimization;
5. Experience in vehicle design is preferred.